Predators form an unusual coexistence in the central Chilean Andes

What does the fox say to a puma?
Pumas are the top predators in the study research area in the Chilean Andes. Camera trap photo by Christian Osorio. Credit: Christian Osorio

In the high plains of the central Chilean Andes, an ecosystem consisting of only a few animal species is providing researchers with new insights into how predators coexist in the wild.


“The puma and the culpeo fox are the only top predators on the landscape in the Chilean Andes,” said Professor Marcella Kelly, of the College of Natural Resources and Environment. “And there isn’t a wide range of prey species, in part because the guanacos [closely related to llamas] aren’t typically found in these areas anymore due to over-hunting. With such a simplified ecosystem, we thought we could really nail down how two rival predators interact.”

Kelly worked with Christian Osorio, a doctoral student in the Department of Fish and Wildlife Conservation, and researchers from the Pontifical

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Learn the Latest on RISC-V and Vector Processing at All Six Andes Technology’s Presentations at the 2020 RISC-V Summit

San Jose, CA, Nov. 06, 2020 (GLOBE NEWSWIRE) — Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding Premier member of RISC-V International will make six presentations at the virtual RISC-V Summit from December 8 to 10, 2020. 

Andes CTO and Executive VP, Charlie Hong-Men Su, will give an overview and update on “Andes RISC-V Processor IP Solutions.” Andes Senior Director of Architecture Div., Chuan-Hua Chang, will present “AndesClarity: a Performance & Bottleneck Analyzer for RISC-V Vector Processors.” Paul Ku, Deputy Technical Director of Architecture Div., will introduce “Building a Secure Platform with the Enhanced IOPMP.”

The SoC industry has seen fast-growing and diversified demands for a wide range of RISC-V based products: from tiny low-power MCUs for consumer devices, to chips powering enterprise-grade products and datacenter servers; from one power-efficient core to a thousand GHz+ cores working cohesively. Charlie Su

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